PROCESS — Wafer in · analog chip out
A complete lithography cycle takes about an hour inside the box, one layer of an analog process. Stack layers, and a working op-amp comes out the other end.
Drop a 50 or 100 mm wafer into the chuck. The HEPA-filtered chamber settles in seconds.
step 01 phase load wafer t+ 01:00 state ok
Closed-loop spin coater lays down photoresist at the thickness you set, 0.7 to 2.5 µm, then softbakes on the integrated hotplate.
step 02 phase resist coat t+ 08:00 state ok
On-device geometry engine rewrites your GDS for the optics: OPC, SRAFs, per-field dose. Matched pairs and common-centroid arrays get extra dose care, because analog lives and dies on device matching.
step 03 phase mask gen t+ 02:00 state ok
365 nm i-line projection optic walks the stage field by field. Closed-loop dose & focus keep transistor pairs, resistor ladders, and capacitor arrays matched across the wafer.
step 04 phase expose t+ 30:00 state ok
TMAH puddle develop, rinse, dry, hardbake. The wafer comes out with your layout in resist.
step 05 phase develop t+ 12:00 state ok
Bright-field camera scans the wafer, flags the defects and CD outliers that turn into offset and mismatch, and logs the run.
step 06 phase inspect t+ 05:00 state ok
07 — Circuits
The micron node is where classic analog was born (the µA741, the 555, the bandgap reference) and it never stopped working: enough matching for precision amplifiers, enough voltage headroom for real-world sensors, and geometries this optic resolves reliably wafer after wafer.
08 — Materials